Senior RTL Design Engineer for AI Accelerator ASIC

SambaNova RTL Design Engineers build blocks of the Reconfigurable Dataflow Unit (RDU) ASICs behind our AI acceleration systems. You’ll own blocks within a larger subsystem, contribute sections of the microarchitecture, write and debug RTL, and carry your blocks through implementation, tape-out, and silicon bring-up.

You’ll work with principal engineers, design verification, and physical design teams, taking on larger blocks as you deepen architectural depth.