Google in Mountain View, CA is seeking a Senior Design Engineer, RTL to drive RTL development and IP integration for cutting-edge silicon solutions powering consumer products.
The role emphasizes deep expertise in ASIC design, Verilog/VHDL, and microarchitecture. You will collaborate with multi-site teams to deliver high-performance, power-efficient hardware with strong validation and verification practices.
#J-18808-LjbffrSenior RTL Design Engineer - Crafting Custom Silicon & IP in mountain view at Unknown Company
This position is listed as full time and onsite.