Qualcomm is seeking an RFIC Design Engineer in Santa Clara to design and develop RF passive components for next-generation RFICs. You will work with the circuit design team to optimize component sizes and performance, delivering compact models and clean physical designs for 6nm/14ff CMOS and SOI technologies.
The ideal candidate has 3+ years in RF/Analog design, strong EM simulation experience, and proficiency with Cadence/Virtuoso/ADS.
#J-18808-LjbffrSenior RFIC & EM Design Engineer in santa clara at Unknown Company
This position is listed as full time and onsite.