Cadence is seeking a Product Engineer for the Digital and Signoff Group (DSG) to provide expert place-and-route know-how for ASIC flows from RTL to GDSII. You will help customers and R&D debug issues, run benchmarks, and contribute to solution development.
The ideal candidate has 5+ years in digital implementation and hands-on experience with timing closure, PPA optimization, and EDA tools across 16nm and below nodes. Strong communication and automation scripting are essential.
#J-18808-LjbffrSenior Product Engineer - ASIC Timing & Signoff in austin at Unknown Company
This position is listed as full time and onsite.