Ampere Computing is seeking a Senior Principal Design Engineer specializing in Static Timing Analysis (STA) and timing methodology to drive timing closure for advanced CPU and SoC designs. This leadership role will define timing strategies, solve complex timing challenges, and influence design, implementation, and verification methodologies across multiple projects.
The ideal candidate combines deep STA, physical design, timing analysis, and semiconductor development flows with strong leadership
#J-18808-LjbffrSenior Principal STA Engineer – Timing & CPU/SoC in santa clara at Unknown Company
This position is listed as full time and onsite.