Cadence Design Systems in California seeks a Sr Principal SI/PI Engineer to advance high-speed IP products. You will contribute hands-on in SI/PI design, verification, and lab measurements, providing channel models and design guidelines for customers.
The role emphasizes collaboration with R&D and customer support to optimize ASIC integration. The position requires strong SerDes/PHY expertise, 3D/2.5D extraction tool fluency, and IBIS-AMI simulations, with a focus on delivering reliable
#J-18808-LjbffrSenior Principal SI/PI Engineer: High-Speed IP Innovator in san jose at Unknown Company
This position is listed as full time and onsite.