Cadence Design Systems in San Jose, CA is seeking a Sr Principal Design Engineer to lead mixed-signal circuit design, verification, and testing for high-speed serial-link IP. The role requires a Ph.D.
in EE with 5+ years or MS in EE with 7+ years in advanced process technologies, and strong collaboration with the digital team to meet performance targets. The ideal candidate will drive architectural decisions, develop test plans, and contribute to product readiness with excellent communication
#J-18808-LjbffrSenior Principal Mixed-Signal Design Architect in san jose at Unknown Company
This position is listed as full time and onsite.