Senior Physical Design Integration Engineer - Hybrid

Intel Corporation in Folsom, CA seeks a Senior Physical Design Integration Engineer to lead the physical design flow for custom CPUs from RTL to GDS. The role requires deep expertise in synthesis, placement, routing, clock tree synthesis, floorplanning, timing analysis, and power integrity.

You will closely collaborate with logic, circuit, architecture, and EDA teams to optimize performance, power, and area, while mentoring a small team and contributing to methodology improvements.