Encore Semi is seeking a Senior Physical Design Engineer to lead RTL-to-GDSII implementation for high-performance SoCs on GF 12LP. The role emphasizes owning advanced FinFET design challenges, pushing PPA, and driving timing closure in a 12LP node environment.
You will work on end-to-end physical design from synthesis to GDSII signoff using Fusion Design Platform, including floorplanning, CTS, and routing, with emphasis on robust STA and signoff methodologies.
#J-18808-LjbffrSenior Physical Design Engineer — Remote (GF 12LP) in workfromhome at Unknown Company
This position is listed as full time and onsite.