Encore Semi, Inc. seeks a Senior Physical Design Engineer to lead RTL-to-GDSII for GF 12LP-based SoCs in a 100% remote role in the USA. You will own advanced FinFET physical design challenges, drive PPA improvements, and deliver robust timing closure using Fusion Compiler and PrimeTime.
The role requires 5+ years of ASIC PD experience with GF 12nm/14nm tape-outs, scripting in Tcl/Python, and a BS/MS in EE or CE. Competitive salary with full benefits and remote work nationwide.
#J-18808-LjbffrSenior Physical Design Engineer - Remote (GF 12LP) in workfromhome at Unknown Company
This position is listed as full time and able to be worked remotely.