Encore Semi is seeking a Senior Physical Design Engineer to lead RTL-to-GDSII implementation for high-performance SoCs on GF 12LP, overseeing advanced FinFET design challenges and achieving robust timing closure. Remote role in the United States.
Responsibilities include floorplanning, CTS, timing signoff, and reliability analyses, using Fusion Compiler and PrimeTime, with scripting in Tcl/Python for flow automation.
#J-18808-LjbffrSenior Physical Design Engineer (Remote) - GF 12LP PPA Leader in workfromhome at Unknown Company
This position is listed as full time and able to be worked remotely.