Lumilens is seeking a Senior Physical Design Engineer to join our silicon design team, developing high‑performance ASICs on 5nm and 3nm TSMC nodes. You will own physical implementation from RTL to GDSII and drive timing and power closure for ultra‑high‑speed designs.
Collaborate with RTL, STA, IP, and verification teams to solve advanced implementation challenges. Proficiency in floorplanning, placement, CTS, routing, and RC extraction is essential, along with scripting skills in Tcl or Python
#J-18808-LjbffrSenior Physical Design Engineer - High-Speed ASICs (5nm/3nm) in san jose at Unknown Company
This position is listed as full time and onsite.