Senior Physical Design Engineer – High-Performance PHY

Apple, Inc. is seeking a forward-thinking Physical Design Engineer in Cupertino to contribute to high-performance PHY design from RTL to GDSII. You will collaborate with architecture, CAD, timing and logic teams to deliver optimized PHY blocks and full-chip flows.

The role emphasizes floor-planning, place & route, power-grid and clock specification development, plus ECO creation and timing closure across SOC designs. A strong background in Verilog, STA and scripting is required.