AMD is seeking a collaborative Physical Design Engineer to drive RTL-to-GDS flows and deliver high-performance IP. You will lead timing-driven place and route, floorplanning, and signoff while coordinating with distributed teams to ensure quality, power, and timing targets are met.
This role emphasizes automation, design methodology, and scalable engineering processes. A degree in EE/CS is preferred; visa sponsorship is not available.
#J-18808-LjbffrSenior Physical Design Engineer - High-Performance IP in santa clara at Unknown Company
This position is listed as full time and onsite.