Altera Corporation is seeking a Physical Design Engineer in San Jose, CA to implement advanced IP and SoC designs, driving timing closure, power optimization, and signoff for next-generation FPGA products.
You will collaborate with RTL, DFT, CAD, architecture, verification, and product engineering teams to deliver manufacturing-ready silicon, with emphasis on performance, reliability, and efficiency. Strong analytical and scripting skills are required for flow automation.
#J-18808-LjbffrSenior Physical Design Engineer for SoC & FPGA in san jose at Unknown Company
This position is listed as full time and onsite.