Lumilens is seeking a Senior Physical Design Engineer to join our silicon design team, building high-performance ASICs on 5nm and 3nm nodes. You will own physical implementation from RTL to GDSII and drive timing, power, and area closures.
Collaborate with RTL, STA, IP, and verification to deliver tapeout-ready designs. Requires 8+ years in physical design, expertise in floorplanning, placement, CTS, routing, and signoff. This is a hands-on role at our San Jose site.
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