Encore Semi, Inc. is seeking a Senior Physical Design Engineer to lead RTL-to-GDSII implementation of high-performance SoCs. You will own advanced FinFET design challenges, push PPA boundaries, and drive robust timing closure on GF 12LP nodes.
You will perform floorplanning, CTS, detailed routing, STA, parasitic extraction, and signoff using Fusion Design Platform and PrimeTime, while developing Tcl/Python scripts to streamline flows and track PPA metrics.
#J-18808-LjbffrSenior Physical Design Engineer - 100% Remote (GF 12LP) in workfromhome at Unknown Company
This position is listed as full time and onsite.