Apple Inc. in the San Francisco Bay Area seeks a senior PHY Design Verification Engineer to drive pre-silicon RTL verification for wireless PHY and interfaces within a leading SoC.
You will collaborate with DV methodologists, designers, and systems engineers to build reusable test benches and metric-driven verification across RF/Analog arch, Systems/PHY/MAC, and FW/SW integration. This role emphasizes energy-efficient design, AI-assisted verification, and Palladium/FPGA validation, with
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