Annapurna Labs (U.S.) Inc. in Cupertino seeks a Senior Manager, Physical Design Engineering to build and lead a world-class PD team for multi‑billion‑transistor ML accelerator SoCs on latest tech nodes.
You will own the PD strategy for Inferentia, Trainium, and future products, drive PPA improvements, and collaborate with RTL, DFT, STA, Packaging, and Validation teams to ensure successful tapeouts.
#J-18808-LjbffrSenior PD Engineering Manager – AI Accelerator SoCs in cupertino at Unknown Company
This position is listed as full time and onsite.