Senior PCIe & CXL SoC Design Engineer | Hybrid Role

Arm is seeking a design engineer with deep experience in micro-architecture, RTL, and SOC integration to help deliver next‑generation compute platforms. You will work on PCIe, CXL and related IP within a collaborative, hybrid team and contribute to architecture reviews and build specifications.

The role requires a strong background in Verilog HDL and digital hardware design, plus hands-on experience with subsystems for PCIe, CXL, UCIe and Ethernet.