Senior Network SoC Verification Engineer

Advanced Micro Devices, Inc. (AMD) is seeking a Design Verification Engineer in Santa Clara to drive verification closure for high‑performance ASIC designs.

You will develop UVM‑based testbenches, create verification plans, and coordinate with RTL, architecture, and firmware teams in a fast‑paced environment. The role emphasizes hands‑on verification, debugging complex RTL issues, and leadership across IP, subsystem, and SoC levels, contributing to AMD networking products and data‑center