Senior Modem SOC RTL Architect for Space Communications

Blue Origin is seeking a Senior Modem SOC Design Engineer to lead RTL design for modem datapath and PHY blocks in the TeraWave SOC. You will define microarchitecture from system specs, implement signal processing hardware, and build the Arm compute subsystem, interfaces, and debug support.

This is a senior IC role contributing to production silicon. The position requires at least five years in digital ASIC/SOC RTL design, Verilog/SystemVerilog expertise, and experience with AXI/SRAM, CoreSight,