Micron Technology in San Jose, CA seeks a Principal Design Engineer to lead datapath design across NAND flash memory. You will drive TSV interface development, timing and signal integrity, and testability, ensuring timing closure on a highly parallel internal bus.
The role requires 8+ years in memory circuit design, with expertise in TSVs, high-speed interfaces, and cross-functional leadership within the NVEG organization. Competitive overall compensation and strong benefits are provided.
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