Rambus in Hillsboro, OR is seeking a Senior Logic Design Engineer to join the Memory Controller team. You will design RTL, define microarchitecture, and guide complex IP features from concept to deployment.
The role emphasizes collaboration with architecture, verification, and customer-facing teams; hybrid work with onsite 3 days/week and 2 days remote; requires strong Verilog/SystemVerilog and 8+ years of RTL/IP experience.
#J-18808-LjbffrSenior Memory Controller RTL Architect (Hybrid) in hillsboro at Unknown Company
This position is listed as full time and able to be worked remotely.