Senior Mask Layout Engineer

Senior Mask Layout Engineer – Fab Tapeout and Validation Team

We are looking for a Senior Mask Layout Engineer to lead full‑reticle tapeouts for trapped‑ion quantum computers, manage internal PDK and layout libraries, and automate mask layout processes. The role works closely with photonic, ion‑trap, and packaging teams to develop new quantum technologies for scalable computing, memory, and networking.

Responsibilities

• Conduct Python‑based layout for full‑reticle tapeouts with commercial foundries
• Develop and maintain internal component PCell and automated circuit layout libraries
• Interface with designers, test engineers, packaging engineers, and foundry teams to define layout rules and component designs
• Implement physical verification checks of layouts, including DRC and LVS
• Document tapeouts in detail and lead layout reviews with other team members
• Collaborate with cross‑functional teams to understand circuit requirements and recommend improvements to design, layout, and test workflows

Qualifications – Basic

• Bachelor’s degree in Photonics, Physics, Electrical Engineering, or related field, or equivalent practical experience
• Knowledge of semiconductor manufacturing processes and techniques
• Excellent programming and software skills, including IDE development, version control, shell scripting, and documentation
• 2+ years of experience with Python‑based mask layout software such as Luceda IPKISS, GDSFactory, or Klayout

Qualifications – Preferred

• M.S. or Ph.D. in Photonics, Physics, Electrical Engineering, or related field
• 5+ years experience generating layout files for complex semiconductor flows with custom elements (MEMS, integrated photonics, superconducting circuits)
• Past ownership of full‑reticle tapeouts with commercial foundries
• Experience with commercial simulation, verification, and layout environments such as Synopsys, Cadence, and Ansys
• Familiarity with photonic and/or analog electronic device principles including design, test, and fabrication
• Proficiency in physical verification (DRC, LVS, ERC)
• Experience with semiconductor and/or photonic workflows for tapeout with commercial foundries
• Excellent verbal and written communication skills
• Meticulous attention to detail and strong track record of documenting requirements, implementation plans, and progress
• Ability to work independently, prioritize tasks, and manage time effectively in a deadline‑oriented environment

Location & Travel

This role is hybrid/onsite in one of the College Park, MD or Bothell, WA campuses. Travel up to 10%.

Compensation

The approximate base salary range is $126,887 – $166,127. Total compensation includes base, bonus, and equity.

Benefits

Comprehensive medical, dental, and vision plans; 401(k) matching; unlimited PTO; paid holidays; parental/adoption leave; legal insurance; home technology stipend.

EEO Statement

At IonQ, we believe in fair treatment, access, opportunity, and advancement for all while striving to identify and eliminate barriers. We empower employees to thrive by fostering a culture of autonomy, productivity, and respect. We are dedicated to creating an environment where individuals can feel welcomed, respected, supported, and valued. We are committed to equity and justice. We welcome different voices and viewpoints and do not discriminate on the basis of race, religion, ancestry, physical and/or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, transgender status, age, sexual orientation, military or veteran status, or any other basis protected by law. We are proud to be an Equal Employment Opportunity employer.

Compliance with U.S. Export Controls

Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident, or lawfully admitted into the U.S. as a refugee or granted asylum. Applications will be subject to U.S. export control and government contract compliance checks, including verification of U.S. Person status and licensing requirements.