Senior Logic Design Engineer – Cache Coherent Interconnects

NVIDIA Corporation is seeking a Senior Logic Design Engineer to contribute to CPU on-chip and interconnect design, covering RTL, timing closure, and ASIC flow. You will collaborate with verification and implementation teams to meet timing and power goals, while mentoring juniors in a global, dynamic organization.

The role emphasizes deep hardware design expertise in CPU architecture, cache coherency, and high-speed interconnects, within NVIDIA's hybrid work environment.