Annapurna Labs, within AWS, is seeking a Package Layout Design Engineer to design advanced IC packages for ML and data center ASICs. You will drive layout tasks from floor planning through tape-out, collaborating with senior engineers, SI/PI, thermal, and manufacturing teams to meet performance and reliability goals.
Experience with 2.5D/3D packaging, RDL/substrate routing, and DFM/DRC is essential. Strong communication and tooling skills (Cadence APD/SiP, Synopsys IC Packaging, Mentor
#J-18808-LjbffrSenior IC Package Layout Engineer - 2.5D/3D-IC in tempe at Unknown Company
This position is listed as full time and onsite.