Annapurna Labs, within AWS, seeks a Package Layout Design Engineer to help design advanced IC packages for next‑gen ML and data center ASICs. You will perform die floor planning, RDL/substrate routing, and interposer work, coordinating with ASIC teams and OSAT partners to deliver robust layouts.
You will also ensure design rules, DFM compliance, and impedance/electrical constraint integration across multi‑layer substrates, with collaboration across SI/PI teams in a dynamic environment in
#J-18808-LjbffrSenior IC Package Layout Engineer (2.5D/3D-IC) in cupertino at Unknown Company
This position is listed as full time and onsite.