Annapurna Labs, within AWS, seeks a Package Layout Design Engineer to advance the physical design of IC packages for next‑gen ML and data center ASICs in Tempe, AZ. You will drive layout from floor planning through tape-out, collaborating with SI/PI, thermal, and manufacturing teams to ensure performance and reliability.
Responsibilities include RDL/substrate routing, die-to-package interface optimization, design rule adherence, and DFM compliance with OSAT partners.
#J-18808-LjbffrSenior IC Package Layout Engineer (2.5D/3D) in austin at Unknown Company
This position is listed as full time and onsite.