Senior High-Speed Layout Architect for Memory Interfaces

Micron Technology, Inc. in California seeks a Senior/Principal Layout Engineer to drive pathfinding and architecture exploration for next‑gen memory modules and form factors. You will lead layout-driven decisions influencing DDR/LPDDR interfaces, SI/PI budgets, and advanced PCB technologies.

You will mentor engineers, collaborate with SI/PI teams, and help define design envelopes for 10–20+ Gb/s signaling while shaping layout methodologies across programs.