River AI seeks exceptional hardware performance engineers to architect and model high-performance custom silicon and FPGA emulators. You will own performance models, ISA and kernel optimization, and collaborate with RTL design engineers.
Responsibilities include simulator development, micro-architectural exploration, workload profiling, and HW/SW co-design with compiler and kernel teams to maximize efficiency on AI workloads. Located in Austin or Palo Alto, with a competitive USD salary.
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