Celero Communications, Inc. is seeking a Full-Chip Physical Verification Engineer to join our Physical Design team in San Jose, CA (HQ in Irvine). You will own all aspects of PV execution on advanced nodes, driving quality, tapeout readiness and timely delivery of complex digital blocks.
The ideal candidate has 7+ years of full-chip PV experience, hands-on with ICV/Calibre, and a proven ability to lead cross-functional verification efforts across projects and tapeout milestones.
#J-18808-LjbffrSenior Full-Chip PV Engineer - Drive Tapeouts & Quality in san jose at Unknown Company
This position is listed as full time and onsite.