Altera, the world’s largest pure-play FPGA solutions provider, seeks a Physical Design Engineer to join our Silicon Design Automation & Implementation team in San Jose, CA. You will contribute to the implementation of custom IP and SoC designs from RTL through GDSII, supporting timing closure, power optimization, and design signoff for next-generation FPGA products.
You will work closely with architecture, RTL, DFT, synthesis, verification, and methodology teams to deliver manufacturing-ready
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