Senior FPGA/PCIe Solutions Architect

AMD is seeking a performant hardware/firmware engineer in San Jose to architect and implement cutting-edge ASIC/FPGA acceleration solutions. You will design high‑speed RTL, validate complex interfaces, and collaborate across global teams.

The role involves system-level integration, pre/post-silicon verification, and hands-on work with Vivado and UVM in a fast-paced environment. A strong background in digital design and compute acceleration is required.