Senior FPGA Design Engineer: AI-Driven Hardware

Palo Alto Networks, Inc. is seeking an experienced FPGA engineer to own digital logic design for high-performance firewalls.

You will lead architecture, RTL implementation, timing closure, and lab bring-up, collaborating with software, hardware, and verification teams. You will synthesize using Vivado, Quartus, and Synopsys, prototype on FPGA platforms, and drive IP integration (PCIe, Ethernet, memory controllers).