Teradyne’s Memory Test Division (MTD) seeks a motivated and technically driven FPGA Engineer to support the development of our cutting-edge memory test solutions. You will design and implement FPGA-based architectures for next-gen Flash and DRAM instrumentation, combining digital and analog design, and collaborate with cross-functional teams.
You will mentor junior engineers, translate customer needs into robust, scalable FPGA designs, and help maintain existing FPGA portfolios to meet quality
#J-18808-LjbffrSenior FPGA Architect - Memory Test Solutions in san jose at Unknown Company
This position is listed as full time and onsite.