Teradyne’s Memory Test Division (MTD) seeks a motivated FPGA Engineer to architect FPGA solutions for Flash/DRAM test instrumentation. You will contribute to high-performance test systems, collaborating with a global team to deliver reliable products on tight schedules.
Ideal candidates have a strong RTL/Verilog background, FPGA tool-flow experience, and familiarity with C/C++. You’ll guide juniors, maintain designs, and may travel to customer sites as needed.
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