Senior First-Silicon Design Verification Engineer

Apple in Cary, NC is seeking a design verification engineer to drive DV for IP and SoC projects from pre-silicon to tape-out. You will define DV methodology, build verification environments, and execute test plans with robust coverage goals.

You will use SystemVerilog/UVM, build scalable test-benches, debug regressions, and report progress with metrics. Experience with LLMs for efficiency is a plus; collaboration across teams is essential.