Quadric is seeking a senior member of the chip design team to contribute across the processor design cycle from architecture to RTL implementation in SystemC or SystemVerilog. The role emphasizes Power, Performance, and Area optimization and timing closure through the full product cycle.
The ideal candidate will have a BS/MS/PhD in Electrical or Computer Engineering with at least five years of CPU/GPU/ASIC front-end design, strong digital design skills, and experience with SystemC/Verilog tools.
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This position is listed as full time and onsite.