Cadence Design Systems in California is seeking an experienced senior software engineer to advance transistor-level timing analysis tools. You will extend architecture, build new frameworks for detailed analysis, and apply machine learning to boost speed and usability across the existing suite.
The role requires deep C++ expertise on Linux, strong data-structures and algorithms skills, and a BS in CS/EE/CE. Competitive compensation and comprehensive benefits are offered.
#J-18808-LjbffrSenior EDA Software Engineer (C++ Characterization) in san jose at Unknown Company
This position is listed as full time and onsite.