Insilico is seeking a Design Verification Engineer to join its team in Santa Clara, CA. This role involves defining and implementing verification methodology and verifying key areas of next-generation ASIC, particularly focusing on PCIE and 400G MAC verification.
The position is initially for 6 months with a high possibility of extension. Insilico is a leader in VLSI, Embedded Design, and Software solutions, offering flexible business models to cater to a range of clients.
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