Senior Director, SoC Verification & Security Engineering

Intel is seeking a Design Verification Engineering Manager in Santa Clara, CA, to lead a team responsible for Xeon SoC verification. You will deploy premier verification processes, collaborate with design, microarchitecture, and post-silicon validation teams, and drive high-quality delivery with rapid execution.

The role emphasizes leadership, security-aware verification, and a strong emphasis on scalable processes within Intel's DCG Xeon SoC group.