IntelliPro is seeking a Principle Digital IC Design Engineer in Santa Clara, CA or Raleigh, NC to own and optimize the digital RTL-to-GDSII flow for mixed-signal PMICs and high-speed data paths.
You will drive backend synthesis, DFT/MBIST insertion, clock tree design, and timing closure, collaborating with System Architects and layout teams to achieve high-frequency performance and low area/power.
#J-18808-LjbffrSenior Digital IC Design Engineer - RTL to GDSII in santa clara at Unknown Company
This position is listed as full time and onsite.