Senior Digital Design Engineer - Front-End ASIC & Equity

A technology company in San Jose seeks a Senior Digital Design Engineer to lead ASIC design efforts. Candidates should have 5–10 years of experience and a solid foundation in digital design, including proficiency in Verilog/SystemVerilog. The role involves creating microarchitecture specs, collaborating with teams for successful tape-outs, and ensuring product quality through rigorous testing. The position offers a competitive salary and a range of benefits, including bonuses and equity.
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