Senior Digital ASIC Design Lead for High‑Speed Interfaces

Micron Technology, Inc. in Boise, Idaho, seeks a Principal ASIC Design Engineer to own RTL design and micro-architecture of digital blocks for high‑speed interface tech leading to tape‑out.

You will collaborate with analog and layout teams, drive CDC and timing constraints, and contribute to verification and documentation for successful silicon.

This senior role offers visibility, a lean team, and opportunities to influence a next‑gen memory/AI hardware program.