Brookhaven National Laboratory seeks a Senior Digital ASIC Design Engineer to lead architecture and RTL design for advanced readout ASICs and SoCs in scientific instrumentation. The role emphasizes low-power, radiation-tolerant, and timing-critical digital systems for detector readout and data acquisition.
You will collaborate with analog/mixed-signal, verification, and firmware teams to deliver robust digital blocks, IPs, and interfaces, supporting EIC projects and other programs across the lab.
#J-18808-LjbffrSenior Digital ASIC Architect for Scientific Readout in ridge at Unknown Company
This position is listed as full time and onsite.