Senior DFT Methodology Engineer: RTL & SoC Architect

NVIDIA seeks a Senior DFT Methodology Engineer to architect and develop test methodologies for next-generation silicon, ensuring testability, debugability, and security from bring-up. You will collaborate across RTL, timing, physical design, software, and production to balance cost and quality.

The role requires 10+ years in SoC architecture, RTL design, and verification with strong scripting skills and a drive to mentor others.