QFocus Technologies in Sunnyvale, CA seeks a Senior DFT Engineer to define, architect, and execute robust DFT strategies for high-performance SoCs and ASICs, collaborating with front-end, physical design, verification, and product teams.
You will implement scan, ATPG, MBIST, and JTAG flows, optimize test coverage, support post-silicon bring-up, and drive test efficiency and silicon yield. Proficiency in Verilog/SystemVerilog and memory test techniques required.
#J-18808-LjbffrSenior DFT Engineer - SoC Test & Bring-Up in san francisco at Unknown Company
This position is listed as full time and onsite.