Intel Foundry Services seeks a Senior DFT Logic Design Engineer in Phoenix, AZ for hybrid on-site/off-site delivery. You will drive DFT/DFM insertion, ATPG validation, and collaborate with customers, IP providers, and vendors to resolve issues and enable successful tape-outs.
Requirements include a BS in Electrical/Computer Engineering or related field, 3+ years in CMOS processes, 3+ years in ASIC DFT/DFM, and 4+ years scripting (Python/Perl/Tcl/sh).
#J-18808-LjbffrSenior DFT/DFM ASIC Engineer - ATPG & Customer Tech Lead in chandler at Unknown Company
This position is listed as full time and hybrid.