Intel Corporation is seeking a Senior DFT Design Engineer in the US for the DCG GPU IP block. You will design RTL/GLS, validate ATPG, and contribute to trace/pattern generation and post-silicon support, ensuring high-quality integration into full chip designs.
The role requires a strong background in DFT features, SoC integration, and proficiency with Tessent or similar tools, within a hybrid work model at Intel locations across the US.
#J-18808-LjbffrSenior DFT Design Engineer - Graphics IP/GPU in folsom at Unknown Company
This position is listed as full time and hybrid.